clang  10.0.0git
Mips.cpp
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1 //===--- Mips.cpp - Implement Mips target feature support -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements Mips TargetInfo objects.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "Mips.h"
14 #include "Targets.h"
15 #include "clang/Basic/Diagnostic.h"
18 #include "llvm/ADT/StringSwitch.h"
19 
20 using namespace clang;
21 using namespace clang::targets;
22 
23 const Builtin::Info MipsTargetInfo::BuiltinInfo[] = {
24 #define BUILTIN(ID, TYPE, ATTRS) \
25  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
26 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
27  {#ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr},
28 #include "clang/Basic/BuiltinsMips.def"
29 };
30 
32  return llvm::StringSwitch<bool>(CPU)
33  .Case("mips3", true)
34  .Case("mips4", true)
35  .Case("mips5", true)
36  .Case("mips64", true)
37  .Case("mips64r2", true)
38  .Case("mips64r3", true)
39  .Case("mips64r5", true)
40  .Case("mips64r6", true)
41  .Case("octeon", true)
42  .Case("octeon+", true)
43  .Default(false);
44  return false;
45 }
46 
47 static constexpr llvm::StringLiteral ValidCPUNames[] = {
48  {"mips1"}, {"mips2"}, {"mips3"}, {"mips4"}, {"mips5"},
49  {"mips32"}, {"mips32r2"}, {"mips32r3"}, {"mips32r5"}, {"mips32r6"},
50  {"mips64"}, {"mips64r2"}, {"mips64r3"}, {"mips64r5"}, {"mips64r6"},
51  {"octeon"}, {"octeon+"}, {"p5600"}};
52 
53 bool MipsTargetInfo::isValidCPUName(StringRef Name) const {
54  return llvm::find(ValidCPUNames, Name) != std::end(ValidCPUNames);
55 }
56 
58  SmallVectorImpl<StringRef> &Values) const {
59  Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
60 }
61 
62 unsigned MipsTargetInfo::getISARev() const {
63  return llvm::StringSwitch<unsigned>(getCPU())
64  .Cases("mips32", "mips64", 1)
65  .Cases("mips32r2", "mips64r2", "octeon", "octeon+", 2)
66  .Cases("mips32r3", "mips64r3", 3)
67  .Cases("mips32r5", "mips64r5", 5)
68  .Cases("mips32r6", "mips64r6", 6)
69  .Default(0);
70 }
71 
73  MacroBuilder &Builder) const {
74  if (BigEndian) {
75  DefineStd(Builder, "MIPSEB", Opts);
76  Builder.defineMacro("_MIPSEB");
77  } else {
78  DefineStd(Builder, "MIPSEL", Opts);
79  Builder.defineMacro("_MIPSEL");
80  }
81 
82  Builder.defineMacro("__mips__");
83  Builder.defineMacro("_mips");
84  if (Opts.GNUMode)
85  Builder.defineMacro("mips");
86 
87  if (ABI == "o32") {
88  Builder.defineMacro("__mips", "32");
89  Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS32");
90  } else {
91  Builder.defineMacro("__mips", "64");
92  Builder.defineMacro("__mips64");
93  Builder.defineMacro("__mips64__");
94  Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS64");
95  }
96 
97  const std::string ISARev = std::to_string(getISARev());
98 
99  if (!ISARev.empty())
100  Builder.defineMacro("__mips_isa_rev", ISARev);
101 
102  if (ABI == "o32") {
103  Builder.defineMacro("__mips_o32");
104  Builder.defineMacro("_ABIO32", "1");
105  Builder.defineMacro("_MIPS_SIM", "_ABIO32");
106  } else if (ABI == "n32") {
107  Builder.defineMacro("__mips_n32");
108  Builder.defineMacro("_ABIN32", "2");
109  Builder.defineMacro("_MIPS_SIM", "_ABIN32");
110  } else if (ABI == "n64") {
111  Builder.defineMacro("__mips_n64");
112  Builder.defineMacro("_ABI64", "3");
113  Builder.defineMacro("_MIPS_SIM", "_ABI64");
114  } else
115  llvm_unreachable("Invalid ABI.");
116 
117  if (!IsNoABICalls) {
118  Builder.defineMacro("__mips_abicalls");
119  if (CanUseBSDABICalls)
120  Builder.defineMacro("__ABICALLS__");
121  }
122 
123  Builder.defineMacro("__REGISTER_PREFIX__", "");
124 
125  switch (FloatABI) {
126  case HardFloat:
127  Builder.defineMacro("__mips_hard_float", Twine(1));
128  break;
129  case SoftFloat:
130  Builder.defineMacro("__mips_soft_float", Twine(1));
131  break;
132  }
133 
134  if (IsSingleFloat)
135  Builder.defineMacro("__mips_single_float", Twine(1));
136 
137  switch (FPMode) {
138  case FPXX:
139  Builder.defineMacro("__mips_fpr", Twine(0));
140  break;
141  case FP32:
142  Builder.defineMacro("__mips_fpr", Twine(32));
143  break;
144  case FP64:
145  Builder.defineMacro("__mips_fpr", Twine(64));
146  break;
147 }
148 
149  if (FPMode == FP64 || IsSingleFloat)
150  Builder.defineMacro("_MIPS_FPSET", Twine(32));
151  else
152  Builder.defineMacro("_MIPS_FPSET", Twine(16));
153 
154  if (IsMips16)
155  Builder.defineMacro("__mips16", Twine(1));
156 
157  if (IsMicromips)
158  Builder.defineMacro("__mips_micromips", Twine(1));
159 
160  if (IsNan2008)
161  Builder.defineMacro("__mips_nan2008", Twine(1));
162 
163  if (IsAbs2008)
164  Builder.defineMacro("__mips_abs2008", Twine(1));
165 
166  switch (DspRev) {
167  default:
168  break;
169  case DSP1:
170  Builder.defineMacro("__mips_dsp_rev", Twine(1));
171  Builder.defineMacro("__mips_dsp", Twine(1));
172  break;
173  case DSP2:
174  Builder.defineMacro("__mips_dsp_rev", Twine(2));
175  Builder.defineMacro("__mips_dspr2", Twine(1));
176  Builder.defineMacro("__mips_dsp", Twine(1));
177  break;
178  }
179 
180  if (HasMSA)
181  Builder.defineMacro("__mips_msa", Twine(1));
182 
183  if (DisableMadd4)
184  Builder.defineMacro("__mips_no_madd4", Twine(1));
185 
186  Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
187  Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
188  Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
189 
190  Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\"");
191  if (CPU == "octeon+")
192  Builder.defineMacro("_MIPS_ARCH_OCTEONP");
193  else
194  Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper());
195 
196  if (StringRef(CPU).startswith("octeon"))
197  Builder.defineMacro("__OCTEON__");
198 
199  // These shouldn't be defined for MIPS-I but there's no need to check
200  // for that since MIPS-I isn't supported.
201  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
202  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
203  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
204 
205  // 32-bit MIPS processors don't have the necessary lld/scd instructions
206  // found in 64-bit processors. In the case of O32 on a 64-bit processor,
207  // the instructions exist but using them violates the ABI since they
208  // require 64-bit GPRs and O32 only supports 32-bit GPRs.
209  if (ABI == "n32" || ABI == "n64")
210  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
211 }
212 
213 bool MipsTargetInfo::hasFeature(StringRef Feature) const {
214  return llvm::StringSwitch<bool>(Feature)
215  .Case("mips", true)
216  .Case("dsp", DspRev >= DSP1)
217  .Case("dspr2", DspRev >= DSP2)
218  .Case("fp64", FPMode == FP64)
219  .Case("msa", HasMSA)
220  .Default(false);
221 }
222 
224  return llvm::makeArrayRef(BuiltinInfo, clang::Mips::LastTSBuiltin -
226 }
227 
229  return llvm::StringSwitch<unsigned>(ABI)
230  .Case("o32", 32)
231  .Case("n32", 64)
232  .Case("n64", 64)
233  .Default(getPointerWidth(0));
234 }
235 
237  // microMIPS64R6 backend was removed.
238  if (getTriple().isMIPS64() && IsMicromips && (ABI == "n32" || ABI == "n64")) {
239  Diags.Report(diag::err_target_unsupported_cpu_for_micromips) << CPU;
240  return false;
241  }
242  // FIXME: It's valid to use O32 on a 64-bit CPU but the backend can't handle
243  // this yet. It's better to fail here than on the backend assertion.
244  if (processorSupportsGPR64() && ABI == "o32") {
245  Diags.Report(diag::err_target_unsupported_abi) << ABI << CPU;
246  return false;
247  }
248 
249  // 64-bit ABI's require 64-bit CPU's.
250  if (!processorSupportsGPR64() && (ABI == "n32" || ABI == "n64")) {
251  Diags.Report(diag::err_target_unsupported_abi) << ABI << CPU;
252  return false;
253  }
254 
255  // FIXME: It's valid to use O32 on a mips64/mips64el triple but the backend
256  // can't handle this yet. It's better to fail here than on the
257  // backend assertion.
258  if (getTriple().isMIPS64() && ABI == "o32") {
259  Diags.Report(diag::err_target_unsupported_abi_for_triple)
260  << ABI << getTriple().str();
261  return false;
262  }
263 
264  // FIXME: It's valid to use N32/N64 on a mips/mipsel triple but the backend
265  // can't handle this yet. It's better to fail here than on the
266  // backend assertion.
267  if (getTriple().isMIPS32() && (ABI == "n32" || ABI == "n64")) {
268  Diags.Report(diag::err_target_unsupported_abi_for_triple)
269  << ABI << getTriple().str();
270  return false;
271  }
272 
273  // -fpxx is valid only for the o32 ABI
274  if (FPMode == FPXX && (ABI == "n32" || ABI == "n64")) {
275  Diags.Report(diag::err_unsupported_abi_for_opt) << "-mfpxx" << "o32";
276  return false;
277  }
278 
279  // -mfp32 and n32/n64 ABIs are incompatible
280  if (FPMode != FP64 && FPMode != FPXX && !IsSingleFloat &&
281  (ABI == "n32" || ABI == "n64")) {
282  Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfpxx" << CPU;
283  return false;
284  }
285  // Mips revision 6 and -mfp32 are incompatible
286  if (FPMode != FP64 && FPMode != FPXX && (CPU == "mips32r6" ||
287  CPU == "mips64r6")) {
288  Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfp32" << CPU;
289  return false;
290  }
291  // Option -mfp64 permitted on Mips32 iff revision 2 or higher is present
292  if (FPMode == FP64 && (CPU == "mips1" || CPU == "mips2" ||
293  getISARev() < 2) && ABI == "o32") {
294  Diags.Report(diag::err_mips_fp64_req) << "-mfp64";
295  return false;
296  }
297 
298  return true;
299 }
void DefineStd(MacroBuilder &Builder, StringRef MacroName, const LangOptions &Opts)
DefineStd - Define a macro name and standard variants.
Definition: Targets.cpp:54
Defines the clang::MacroBuilder utility class.
unsigned getLongWidth() const
getLongWidth/Align - Return the size of &#39;signed long&#39; and &#39;unsigned long&#39; for this target...
Definition: TargetInfo.h:401
bool hasFeature(StringRef Feature) const override
Determine whether the given target has the given feature.
Definition: Mips.cpp:213
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
Definition: TargetInfo.h:994
DiagnosticBuilder Report(SourceLocation Loc, unsigned DiagID)
Issue the message to the client.
Definition: Diagnostic.h:1300
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
===-— Other target property query methods --------------------——===//
Definition: Mips.cpp:72
uint64_t getPointerWidth(unsigned AddrSpace) const
Return the width of pointers on this target, for the specified address space.
Definition: TargetInfo.h:361
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:53
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:149
Defines the Diagnostic-related interfaces.
unsigned getUnwindWordWidth() const override
Definition: Mips.cpp:228
bool validateTarget(DiagnosticsEngine &Diags) const override
Check the target is valid after it is fully initialized.
Definition: Mips.cpp:236
unsigned getIntWidth() const
getIntWidth/Align - Return the size of &#39;signed int&#39; and &#39;unsigned int&#39; for this target, in bits.
Definition: TargetInfo.h:396
Enumerates target-specific builtins in their own namespaces within namespace clang.
unsigned getISARev() const
Definition: Mips.cpp:62
void fillValidCPUList(SmallVectorImpl< StringRef > &Values) const override
Fill a SmallVectorImpl with the valid values to setCPU.
Definition: Mips.cpp:57
const std::string & getCPU() const
Definition: Mips.h:174
Dataflow Directional Tag Classes.
bool processorSupportsGPR64() const
Definition: Mips.cpp:31
ArrayRef< Builtin::Info > getTargetBuiltins() const override
Return information about target-specific builtins for the current primary target, and info about whic...
Definition: Mips.cpp:223
enum clang::targets::MipsTargetInfo::FPModeEnum FPMode
bool isValidCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name.
Definition: Mips.cpp:53
static constexpr llvm::StringLiteral ValidCPUNames[]
Definition: Mips.cpp:47
void defineMacro(const Twine &Name, const Twine &Value="1")
Append a #define line for macro of the form "\#define Name Value\n".
Definition: MacroBuilder.h:29