AMDGPU Instructions Notation¶
Introduction¶
This is an overview of notation used to describe syntax of AMDGPU assembler instructions.
This notation mimics the syntax of assembler instructions except that instead of real operands and modifiers it provides references to their description.
Instructions¶
Operands¶
An instruction may have zero or more operands. They are comma-separated in the description:
The order of operands is fixed. Operands cannot be omitted except for special cases described below.
Notation¶
An operand is described using the following notation:
<kind><name><tag0><tag1>…
Where:
kind is an optional prefix describing operand kind.
name is a link to a description of the operand.
tags are optional. They are used to indicate special operand properties.
Operand Kinds¶
Operand kind indicates which values are accepted by the operand.
Operands which only accept vector registers are labelled with ‘v’ prefix.
Operands which only accept scalar values are labelled with ‘s’ prefix.
Operands which accept both vector registers and scalar values have no prefix.
Examples:
vdata // operand only accepts vector registers
sdst // operand only accepts scalar registers
src1 // operand accepts both scalar and vector registers
Operand Tags¶
Operand tags indicate special operand properties.
Operand tag
Meaning
:opt
An optional operand.
:m
An operand which may be used with VOP3 operand modifiers or SDWA operand modifiers.
:dst
An input operand which may also serve as a destination if glc modifier is specified.
:fx
This is an f32 or f16 operand depending on m_op_sel_hi modifier.
:<type>
Operand type differs from type implied by the opcode name. This tag specifies actual operand type.
Examples:
src1:m // src1 operand may be used with operand modifiers
vdata:dst // vdata operand may be used as both source and destination
vdst:u32 // vdst operand has u32 type